Although SATA is still a dominant interface in embedded and NetCom systems, the future belongs to PCIe. PCIe breaks the bandwidth limitations of SATA and offers flexible solutions with multiple lanes that can be combined.
An important innovation to increase the performance is the new protocol NVMe, which has been designed specifically for Non Volatile Memory. It reduces significantly the latency of read and write requests by using more efficient commands.
With higher performance also comes higher power consumption, especially with the common 4-lane configuration.
The Swissbit N-10m2 module, a PCIe Gen3 / NVMe 1.2 module, only uses 2 PCIe lanes and reduces the power consumption without sacrificing performance. Even if only operated with one single PCIe lane, the performance still exceeds the SATA limits. The N-12m2 module is a DRAM-less version with reduced power consumption.
For high endurance requirements the N-10m2 and N-12m2 are also available in pSLC versions with N-16m2 and N-18m2 series name. They deliver more than tenfold TWB values.
The new N-20m2 is a very flexible solution for PCIe Gen3.1 / NVMe 1.3 and 4 lanes. It supports Host Memory Buffer operation and delivers high performance.
The PCB of the N-20m2 can be cut to length from 22110 to 2230 length. Also for the N-20m2 there is a pSLC version available: N-26m2.