The Gen5 PCIe SSD family D2200 is designed for enterprise servers and edge data centers and offers outstanding performance with minimal latency. The D2200 also excels in energy efficiency, delivering a sequential read performance of up to 970 MB/s per watt. This efficiency also impacts thermal management, with the D2200’s optimized hardware design and firmware enhancements reducing server heat generation by up to 20°C. As a PCI Gen5 SSD that is backward compatible with PCIe Gen4, the series supports NVMe 2.0 and OCP 2.0, making it future-proof. Backed by our commitment to exceptional customer service, we ensure seamless integration and direct support for your business needs.
Series Name |
D2200 U.2 |
Standard & Interface |
PCIe Gen 5.0 / NVMe 2.0b, x4 lanes |
Package |
2.5” |
Connector |
SFF-8639 U.2 |
Outline Dimensions (L x W x H) |
100.2mm x 69.85mm x 15mm |
Flash Type |
3D NAND eTLC |
Density Range |
7.68 TB, 15.4 TB, 30.7 TB |
Endurance [DWPD] |
1.5 for 5 years |
Operating Temperature |
0°C to +70°C |
Storage Temperature |
-40°C to +85°C |
Sustained Performance Sequential Read Sequential Write Random Read Random Write |
up to 14,000 MB/s up to 10,000 MB/s up to 2,600 KIOPS up to 510 KIOPS |
Voltage |
VCC: 12 V (-20%, +10%) |
Average Power |
19.5 W |
DRAM |
DDR4 DRAM |
MTBF |
> 2,000,000 hours |
Data Reliability |
< 1 sector per 10^17 bits |
Features & Tools |
powersafe™ Functionality |
Features
Various effects like data retention, read disturb limits, or temperature can impact data reliability. The latest generation of Swissbit products use special methods to maintain and refresh the data for higher data integrity.
The product designs are in line with the latest regulations for electrostatic discharge and electromagnetic interference. Swissbit strives to exceed these limits with our own in-house technology and production capabilities, for example with System-in-Package (SiP) competence.
Products with the Swissbit powersafe feature use reliable tantalum capacitors to store energy so that in case of a sudden power fail the charge will be used to harden the cache content into the NAND flash.
The sensor allows the host hardware or software to monitor the memory device temperature to improve data reliability in the target application environment.
The TRIM command allows the operating system to inform the SSD which blocks of data are no longer considered in use and can be wiped out internally, which increases system performance in following write accesses. With TRIM Support data scrap can be deleted in advance, which otherwise would slow down future write operations to the involved blocks.
Sophisticated Wear Leveling and Bad Block Management ensure that Flash cells are sparingly and equally used in order to prolong life time of the device.