The Gen 5 PCIe family D2200 is engineered for superior performance and reliability in data centers and enterprise environments. The D2200 sets a new standard for next generation connectivity, providing the best IOPS/watt performance, low latency and cutting-edge safety and security features. Backend by our commitment to exceptional customer service, we ensure seamless integration and direct support for your business needs. Experience the future of connectivity with the D2200 solution, tailored to meet the demands of high-performance applications and enabling your business to thrive in today’s rapidly evolving digital landscape.
Series Name |
D2200 U.2 |
Standard & Interface |
PCIe Gen 5.0 / NVMe 2.0b, x4 lanes |
Package |
2.5” |
Connector |
SFF-8639 U.2 |
Outline Dimensions (L x W x H) |
100.2mm x 69.85mm x 15mm |
Flash Type |
3D NAND eTLC |
Density Range |
7.68 TB, 15.4 TB, 30.7 TB |
Endurance [DWPD] |
1.5 for 5 years |
Operating Temperature |
0°C to +70°C |
Storage Temperature |
-40°C to +85°C |
Sustained Performance Sequential Read Sequential Write Random Read Random Write |
up to 14,000 MB/s up to 10,000 MB/s up to 2,600 KIOPS up to 510 KIOPS |
Voltage |
VCC: 12 V (-20%, +10%) |
Average Power |
19.5 W |
DRAM |
DDR4 DRAM |
MTBF |
> 2,000,000 hours |
Data Reliability |
< 1 sector per 10^17 bits |
Features & Tools |
powersafe™ Functionality |
规格
Various effects like data retention, read disturb limits, or temperature can impact data reliability. The latest generation of Swissbit products use special methods to maintain and refresh the data for higher data integrity.
Intelligent Power Fail Protection and Recovery protects data from unexpected power loss. During an unintentional shutdown, firmware routines and an intelligent hardware architecture ensure that all system and user data will be stored to the NAND.
Products with the Swissbit powersafe feature use reliable tantalum capacitors to store energy so that in case of a sudden power fail the charge will be used to harden the cache content into the NAND flash.
In many industrial applications the data is written to the NAND Flash once and is only read afterwards. For such cases, the firmware can be optimized in order to guarantee the highest possible data retention and less read disturb.
Robustness is one of our key specification targets. The design, assembly and use of selected materials guarantee an extremely solid design which has been validated by extensive testing.
The sensor allows the host hardware or software to monitor the memory device temperature to improve data reliability in the target application environment.
The TRIM command allows the operating system to inform the SSD which blocks of data are no longer considered in use and can be wiped out internally, which increases system performance in following write accesses. With TRIM Support data scrap can be deleted in advance, which otherwise would slow down future write operations to the involved blocks.
The WAF (write amplification factor) for MLC-based products is reduced by combining a paged based FW block management with a powerful card architecture and configuration settings.
Sophisticated Wear Leveling and Bad Block Management ensure that Flash cells are sparingly and equally used in order to prolong life time of the device.